1. Field of the Invention
The present invention is generally in the field of memory arrays. More particularly, the present invention relates to content addressable memory arrays.
2. Background Art
A conventional CAM (content addressable memory) array typically operates by comparing data on an input data bus (the “compare data”) to data in every word (the “stored data”) in the CAM array quickly, e.g. in one hardware operation, and outputting the address of a word storing matching data, if such a word exists. Conventional CAM arrays are thus useful in certain high-speed applications that search for equality between compare data and stored data. By reconfiguring a conventional CAM array, the CAM array can alternatively be utilized for range checking applications.
CAM arrays configured for range checking applications do not search for equality between compare data and stored data, but instead determine whether compare data has a value in a target range between two values represented by stored data. Utilizing a conventional CAM array to perform range checking operations has several drawbacks. A conventional CAM array can be configured for a range checking application by storing every value in the range in the conventional CAM array and adding additional range checking circuits. If compare data is equal to any value in the range stored in the conventional CAM array, the additional range checking circuits can signal a range-match condition on a range check output. Configuring the conventional CAM array to perform a range checking operation as described has a high area cost associated with storing the entire range, and the width of the range is limited by the number of words in the conventional CAM array, thereby limiting flexibility.
Thus, there is a need in the art for a CAM array that overcomes disadvantages associated with using conventional CAM arrays for range checking and bound checking applications.